This invention relates generally to high electron mobility transistors (HEMTs) and, more particularly, to such transistors used for high power applications. By way of background, a HEMT is a metal semiconductor field-effect transistor (MESFET) fabricated on a doped aluminum gallium arsenide and undoped gallium arsenide heterostructure, preferably formed by molecular beam epitaxy. When, for example, a silicon-doped aluminum gallium arsenide (AlGaAs) layer is grown on an undoped gallium arsenide (GaAs) layer, a heterojunction is formed between the two layers. A two-dimensional electron gas is formed on the GaAs side of the heterojunction due to the unique crystal structure of the heterostructure and the greater electron affinity of the GaAs. The AlGaAs layer is fully depleted of mobile charge near the heterojunction and acts like the gate oxide of a metal oxide semiconductor field-effect transistor.
When a Schottky barrier gate is deposited on the AlGaAs layer, a depletion region is formed beneath the gate. The resulting device functions as a field-effect transistor in that the Schottky barrier gate controls the number of electrons in the two-dimensional electron gas formed on the GaAs side of the heterojunction.
Carrier transport in the electron gas is similar to transport in undoped GaAs, where the electron mobility is many times greater than doped GaAs because there is little or no impurity scattering. As a result, the electrons travel at twice the saturated velocity of a conventional GaAs MESFET. Thus, ultra-high-speed digital integrated circuits can be fabricated with HEMT devices. For example, HEMT ring oscillators have been fabricated with 12-picosecond switching delays at room temperature.
In spite of the promise of HEMT devices to provide high-response speeds in digital integrated circuits, there are some significant factors that limit the application of the HEMT as a power transistor, sometimes referred to as a HEMPT. One of the principal factors limiting the power output capability of a HEMT is its relatively low gate-drain breakdown voltage in comparison to conventional GaAs power FETs. GaAs power FETs can be designed to provide a gate-drain breakdown voltage in the range 30-60 volts between the gate and drain. Current HEMT structures are only able to support 8-10 volts between the gate and drain before breaking down.
The term "breakdown" is used loosely to refer to a phenomenon of rapidly increasing drain current in response to only small increases in drain-source voltage. In a conventional GaAs FET, breakdown refers to an avalanche breakdown phenomenon, in which electron-hole pairs are generated by high-energy electrons at an edge of the gate closest to the drain. These carriers contribute to the excess drain current by which the breakdown is observed. In a HEMT device, electrons will scatter from the two-dimensional electron gas at energies much lower than are required to initiate avalanche breakdown. There is an analogous effect, however, caused by the flow of "three-dimensional" electrons outside the two-dimensional electron gas. Some of the three-dimensional electrons scatter back into the AlGaAs layer of the device and follow conduction paths parallel to the two-dimensional electrons in the gate-drain region of the transistor. Some electrons also contribute to a space-charge-limited current flow through the GaAs buffer layer of the device if they are not confined by another heterojunction barrier. The excess drain current associated with these three-dimensional electrons is responsible for a low output resistance, and it limits the maximum drain voltage that can be applied before excessive drain current flows.
It will be appreciated from the foregoing that there is a need for an improved HEMT structure for operation at high powers. Specifically, what is needed is a HEMT structure that provides for an increased gate-drain breakdown voltage as compared with HEMT structures of the prior art. The present invention satisfies this need.